IRTTech Blog

103             Accept                                    A Novel Distributed and Interleaved FIFO for Source-synchronous Interconnect

107             Accept                                    Handling Trapezoidal Conductor Cross-sections in a Statistical Capacitance Extractor

137             Accept                                    Novel Architecture of Context Modeling for JPEG2000 & a comparison with Taubman's Architecture

158              Accept                                    Automatic Test Generation for Temporal Coverage Points Using a Stochastic Tree Model

172             Accept                                    RF Energy Scavenging for Wireless Sensor Nodes

186              Accept                                    HIGH PERFORMANCE AND AREA EFFICIENT n-BIT TREE BASED BINARY SQUARER

196              Accept                                    ENERGY EFFICIENT APPLICATION SPECIFIC BANKED REGISTER FILES

216              Accept                                    Detecting Faults at the Time They Occur

233             Accept                                    Detection of Bridging Fault in Reversible Circuits

242             Accept                                    DESIGN OF HARDWARE COPROCESSOR FOR OTDR APPLICATION

247             Accept                                    A NOVEL ALL DIGITAL PHASE LOCKED LOOP FOR PHASE TRACKING IN GPS RECEIVERS

322             Accept                                    A NOVEL CMOS COMPATIBLE THREE TERMINAL 3D   TUNABLE MICRO INDUCTOR

326             Accept                                    GENERAL PURPOSE CAPACITIVE SENSING CIRCUIT USING CORRELATED DOUBLE SAMPLING

329             Accept                                    Critical Path modeling for Dynamic Voltage Scaling (DVS) in Low Power Applications

333             Accept                                    DESIGN & STUDY OF AN ELECTROSTATIC TORSION MICRO ACTUATOR FOR BEAM STEERING IN HORIZONTAL PLANE

356             Accept                                    A Novel Low Power Bus Encoding Technique for Minimizing RGB Transitions for LCD Display of Digital Camera

359             Accept                                    AN EFFICIENT FPGA IMPLEMENTATION OF A CRYPTOGRAPHIC HASH ALGORITHM BASED ON CELLULAR AUTOMATA

371             Accept                                    A Novel LO circuit for Sub-Harmonic Mixer

374             Accept                                    Exact Method for Estimating Expected Settling Power in Sequential Circuits

407             Accept                                    On the Quality of Transition Fault Tests

412              Accept                                    Spectral Characterization of Functional Vectors for Gate-Level Fault Coverage Tests 

425             Accept                                    Integrated Stability Analysis Methods for Hybrid Systems

219              Accept                                    Constructing Online Testable Circuits Using Reversible Logic

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Short Papers (8 pages in VDAT Proceedings and 15 minutes of presentation)

124               Short                                          Implementation of MPEG4 Video Decoder on a SoC Multimedia Processor

128               Short                                          Highly Linear, Highly Efficient Power Amplifier Design Using Diode Nonlinear Capacitance

137               Short                                          Novel Architecture of Context Modeling for JPEG2000 & a comparison with Taubman's Architecture

145               Short                                          Low Voltage Sample and Hold circuit

159               Short                                          Efficient DRC for Verification of Large VLSI Layouts

235               Short                                          SOC implementation of the neural network based isolated word recognition

245               Short                                          An Energy-Efficient Packet Filtering Architecture for Wireless Sensor Nodes

262               Short                                          DESIGN AND OPTIMIZATION OF ON CHIP SPIRAL INDUCTOR FOR SILICON BASED RF IC'S

267               Short                                          A Novel Unified Framework for Functional Verification of Processors Using Constraint Solvers

284               Short                                          STUDY AND CHARECTERIZATION OF GALLIUM ARSENIDE (GaAs) AND INDIUM PHOSPHIDE (InP) DEVICES FOR NANOAPPLICATIONS.

325               Short                                          Gas Sensor Interface ASIC on  0.7µm  CMOS Technology

340               Short                                          FAULT TOLERANT FPGA USING REDUNDANT COLUMNS

347               Short                                          FPGA Implementation of a new hardware architecture for Smoothing Two Dimensional Images

363               Short                                          A Power-Efficient Architecture for the 2-D Discrete Wavelet Transform

367               Short                                          DESIGN AND IMPLEMENTATION OF MORPHOLOGICAL OPERATIONS AND MEDIAN FILTER FOR IMAGE PROCESSING APPLICATIONS

375               Short                                          A FULLY ON-CHIP AUTOMATIC GAIN CONTROL FOR RF-TRANSCEIVERS COMPLYING IEEE 802.15.4,LR-WPAN

379               Short                                          Waveform Analysis and Delay Prediction for a CMOS Gate Driving RLC Interconnect Load

384               Short                                          Comparison of Compression techniques for FPGA configuration bit stream

387               Short                                          Simulation Of Silicon Nanowire Field Effect Transistors, Carbon Nano Tube Field Effect Transistors and Comparison with Double Gate di-Electric silicon MOSFET

392               Short                                          A NOVEL ALGORITHM FOR FAULT DIAGNOSIS IN ANALOG CIRCUITS USING SMALL CHANGE SENSITIVITY COMPUTATION

394               Short                                          AN IMPROVED DIRECT INJECTION READOUT STRUCTURE FOR IR FPA

405               Short                                          Architectural Design and Implementation of a PC based Ultrasound Imaging System

406               Short                                          Design of an Efficient Low Power AES Engine for Zigbee Systems

414               Short                                          Cross talk Aware Multi-objective Optimal Routing for Island Style FPGA

183               Short                                          A Dedicated Processor to Realize Inverse Radon Transform for CT Imaging

Embedded Tutorials (10 pages in VDAT Proceedings and 1 hr presentation)

Spectral Characterization of Functional Vectors for Gate-Level Fault Coverage Tests 

Electrostatic Discharge Reliability for designers

Robust Power Delivery for Sub-100nm Integrated Circuits